Wei-Chang Tsai
This course is designed to provide students who are using the standard component library to design digital circuit chips for the first time to quickly gain an overall understanding of the entire cell-based design process. In the future, this will help them avoid errors during the actual design process that result from only focusing on particular steps. The course not only covers the concepts of cell-based IC design flow, the standard component library, and HDL (the Hardware Description Language), it also includes the practical concepts of logic simulators, logic synthesizers, and place & route. It thus provides students with an overall understanding of software usage and design practices required for the process.
1. Overview
2. Verilog
3. Simulation
4. CodeCoverage
5. LogicSynthesis
6. Delay
7. STA
8. Power
9. DFT
10. FEC
11. APR
Aout TSRI
The Taiwan Semiconductor Research Institute (TSRI) under the National Applied Research Laboratories (NARLabs) is a consolidation of the National Chip Implementation Center (CIC) and National Nano Device Laboratories (NDL). An integrated research environment for related fields of study in Taiwan is urgently required to enhance the overall cultivation of quality talents in response to the introduction of the 3-nm node; rapid development of new applications (e.g., artificial intelligence, quantum computers, next-gen magnetic random access memory, high-speed computers, and 5G network); and challenges posed by countries including European countries, the United States, Japan, and South Korea.